CPU Architecture
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CPU Features
– ARM® Cortex®M0 32-bit processor – Single Wire Debug (SWD) interface – Four-channel Direct Memory Access (DMA) controller – Brown-out Detector and Power-on Reset (POR) – Watchdog timer
Operating Frequency [Max] (MHz)
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Flash (kB)
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SRAM (kB)
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Debugging
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on-chip RC
32 kHz Real Time Clock crystal oscillator (RTC XO)
Pitch
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Channels
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ADC [Number, bits]
2-channel 11-bit Analog-to-Digital Converter
True Random Number Generator
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NFC Tag
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SPI
One Serial Peripheral Interface (SPI) Master/Slave;One SPI Flash
DAC [Number, bits]
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SSI
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SPI
One Serial Peripheral Interface (SPI) Master/Slave
Debug interface
Single Wire Debug (SWD)
Human Machine Interface
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Programmable channels
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Fixed channels
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Channel groups
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Supply Voltage [Min to Max] (V)
3.2 V~ 4.2 V
Regulated supply for external components
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Crypto Accelerator
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Public Key Hardware Accelerator
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Accelerator
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Security
128-bit AES, Secure Hash Algorithm (SHA) - 256
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Current
– 2.01 μA sleep current
– 3.91 mA peak TX current(2)
– 5.24 mA peak RX current
– 15.1 μA average advertisement current
Sensor Controller
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Standby
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Transceiver Compatible
Bluetooth v5.0, FCC CFR47 Part 15, ARIB STD-T66, and TELEC
Receiver Sensitivity
-95 dBm/-93 dBm programmable receiver sensitivity
Output Power
-55 dBm to +3.5 dBm programmable Tx output power
Frequency Regulation
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Protocols
Bluetooth 5.0, FCC, CFR47 Part 15, ARIB STD-T66, TELEC
Dimension
29 x 15 x 2.5mm
Package Type
Surface mount module
DSP RAM
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DSP Clock Speed
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DSP Clock Speed
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Voice Services
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General
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